This laboratory results shows the Verilog hardware design language (HDL) and Finite State Machine to control a pedestrian crossing controller and its modification. In session-1, simple Verilog program is simulated and then tested on Coolrunner-II board. In this session the controller three outside world input which are Clock (CLK), Reset (RESET), Pedestrian (PED) and three output which are Red light (RED), Amber light (AMBER), Green light (GREEN).
In session-2, some modifications are done on Verilog program used in session-1 and then again simulated and tested on Coolrunner-II board. In this session the controller 7 segment displays is used to see changes in pelstate, while running modified Verilog program on Coolrunner-II board and Carsensor outside world input has been introduced in modified Verilog program. In this modified Verilog program, number of pelstate has been increased.
This laboratory session provides a good opportunity to learn Xilinx ISE Design Suit software and introduce to Coolrunner-II board.
Inhaltsverzeichnis (Table of Contents)
- Introduction
- Session I
- Verilog modules and 'ucf' file for session - I
- State Diagram of Session - I
- Simulation for Session - I
- CPLD Fitting Report for Session — I
- Working of Program on Coolrunner – II
- Session II
- State Diagram for Session - II
- Verilog modules and 'ucf' file for session - II
- Simulation for Session - II
- CPLD Fitting Report for Session - II
- Working of Program on Coolrunner - II
- Conclusion
- Bibliography
Zielsetzung und Themenschwerpunkte (Objectives and Key Themes)
This report details the design and implementation of a pedestrian crossing controller using Verilog hardware description language (HDL) and finite state machines (FSMs). The report focuses on two sessions, each involving the development, simulation, and testing of a Verilog program on a Coolrunner-II board. The primary objective is to demonstrate the application of Verilog HDL and FSMs in designing a practical system, showcasing the process of hardware design, simulation, and implementation.
- Verilog HDL and FSM design for a pedestrian crossing controller
- Simulation and testing of Verilog programs using Xilinx ISE Design Suite
- Implementation of the controller on a Coolrunner-II board
- Analysis of the controller's functionality and performance
- Exploration of modifications and enhancements to the controller design
Zusammenfassung der Kapitel (Chapter Summaries)
Session I introduces the basic design of the pedestrian crossing controller. It includes the Verilog modules and 'ucf' file for the controller, a state diagram illustrating its operation, and simulation results. The session also covers the CPLD fitting report and the working of the program on the Coolrunner-II board. The focus is on demonstrating the fundamental principles of Verilog HDL and FSM design in a practical context.
Session II builds upon the design from Session I, incorporating modifications and enhancements. This session includes a revised state diagram, updated Verilog modules and 'ucf' file, and simulation results for the modified controller. The session also discusses the CPLD fitting report and the working of the program on the Coolrunner-II board. The focus is on demonstrating the flexibility and adaptability of Verilog HDL and FSMs in addressing design requirements and implementing enhancements.
Schlüsselwörter (Keywords)
The keywords and focus themes of the text include Verilog HDL, finite state machines, pedestrian crossing controller, Coolrunner-II board, Xilinx ISE Design Suite, hardware design, simulation, implementation, and CPLD fitting. The report explores the application of these concepts in designing and implementing a practical system, highlighting the process of hardware design, simulation, and testing.
- Quote paper
- Ninad Gondhalekar (Author), 2013, Verilog Design of a Pedestrian Crossing, Munich, GRIN Verlag, https://www.grin.com/document/284210
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