This laboratory results shows the Verilog hardware design language (HDL) and Finite State Machine to control a pedestrian crossing controller and its modification. In session-1, simple Verilog program is simulated and then tested on Coolrunner-II board. In this session the controller three outside world input which are Clock (CLK), Reset (RESET), Pedestrian (PED) and three output which are Red light (RED), Amber light (AMBER), Green light (GREEN).
In session-2, some modifications are done on Verilog program used in session-1 and then again simulated and tested on Coolrunner-II board. In this session the controller 7 segment displays is used to see changes in pelstate, while running modified Verilog program on Coolrunner-II board and Carsensor outside world input has been introduced in modified Verilog program. In this modified Verilog program, number of pelstate has been increased.
This laboratory session provides a good opportunity to learn Xilinx ISE Design Suit software and introduce to Coolrunner-II board.
Contents
Introduction
Session – I
Verilog modules and ‘ucf’ file for session – I
State Diagram of Session – I
Simulation for Session – I
CPLD Fitting Report for Session – I
Working of Program on Coolrunner – II
Session – II
State Diagram for Session – II
Verilog modules and ‘ucf’ file for session – II
Simulation for Session - II
CPLD Fitting Report for Session – II
Working of Program on Coolrunner – II
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Upload your own papers! Earn money and win an iPhone X. -
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